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Listar por autor "Ruiz Amaya, Jesús"
Mostrando ítems 1-17 de 17
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Ponencia
A 0.13μm CMOS current steering D/A converter for PLC and VDSL applications
Ruiz Amaya, Jesús; Fernández Bootello, Juan Francisco; Rosa Utrera, José Manuel de la; Delgado Restituto, Manuel ; Río Fernández, Rocío del (2005)This paper describes the design of a 12-bit 80MS/s Digital-to-Analog converter implemented in a 0.13μm CMOS logic ...
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Ponencia
A 5.3mW, 2.4GHz ESD protected Low-Noise Amplifier in a 0.13μm RFCMOS technology
Brandano, Davide; Delgado Restituto, Manuel; Ruiz Amaya, Jesús; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2007)An Electrostatic Discharge (ESD) protected Low- Noise Amplifier (LNA) for the 2.4 GHz ISM band designed in a 0.13 mum ...
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Artículo
A Low Noise Amplifier for Neural Spike Recording Interfaces
Ruiz Amaya, Jesús; Rodríguez Pérez, Alberto; Delgado Restituto, Manuel (Multidisciplinary Digital Publishing Institute, 2015)This paper presents a Low Noise Amplifier (LNA) for neural spike recording applications. The proposed topology, based on ...
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Artículo
A Low-Power Programmable Neural Spike Detection Channel With Embedded Calibration and Data Compression
Rodríguez Pérez, Alberto; Ruiz Amaya, Jesús; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2012)This paper reports a programmable 400 μm pitch neural spike recording channel, fabricated in a 130 nm standard CMOS ...
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Ponencia
A power efficient neural spike recording channel with data bandwidth reduction
Rodríguez Pérez, Alberto; Ruiz Amaya, Jesús; Rodríguez Rodríguez, José Antonio; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2011)This paper presents a mixed-signal neural spike recording channel which features, as an added value, a simple and low-power ...
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Ponencia
A self-calibration circuit for a neural spike recording channel
Rodríguez Pérez, Alberto; Ruiz Amaya, Jesús; Delgado Restituto, Manuel; Sawan, Mohamad; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2011)This paper presents a self-calibration circuit for a neural spike recording channel. The proposed design tunes the bandwidth ...
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Artículo
Accurate Settling-Time Modeling and Design Procedures for Two-Stage Miller-Compensated Amplifiers for Switched-Capacitor Circuits
Ruiz Amaya, Jesús; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2009)We present modeling techniques for accurate estimation of settling errors in switched-capacitor (SC) circuits built with ...
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Ponencia
An auto-calibrated neural spike recording channel with feature extraction capabilities
Rodríguez Pérez, Alberto; Ruiz Amaya, Jesús; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito (The International Society for Optics and Photonics, 2011)This paper presents a power efficient architecture for a neural spike recording channel. The channel offers a selfcalibration ...
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Ponencia
An Embedded 12-bit 80MS/s A/D/A Interface for Power-Line Communications in 0.13μm Pure Digital CMOS Technology
Delgado Restituto, Manuel; Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Fernández Bootello, Juan Francisco; Díez Villar, Leila; Río Fernández, Rocío del; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2005)This paper presents an embedded interface, comprising both A/D and D/A converters, which has been implemented in a 0.13μm ...
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Ponencia
An Optimization-based Tool for the High-Level Synthesis of Discrete-time and continuous-Time Sigma-Delta Modulators in the MATLAB/SIMULINK Environment
Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Fernández Fernández, Francisco Vidal; Río Fernández, Rocío del; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004)This paper presents a MATLAB toolbox for the automated high-level sizing of ΣΔ Modulators (ΣΔMs) based on the combination ...
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Ponencia
Behavioral Modeling, Simulation and High-Level Synthesis of Pipeline A/D Converters
Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Delgado Restituto, Manuel ; Rodríguez Vázquez, Ángel Benito (2005)This paper presents a MATLAB® toolbox for the time-domain simulation and high-level sizing of pipeline analog-to-digital ...
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Ponencia
Electrical-level synthesis of pipeline ADCs
Ruiz Amaya, Jesús; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2008)This paper presents a design tool for the synthesis of pipeline ADCs which is able to optimally map high-level converter ...
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Artículo
High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models
Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Fernández Fernández, Francisco Vidal; Medeiro Hidalgo, Fernando; Río Fernández, Rocío del; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2005)This paper presents a high-level synthesis tool for ΣΔ Modulators (ΣΔMs) that combines an accurate SIMULINK-based time-domain ...
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Ponencia
MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time Sigma-Delta Modulators
Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Fernández Fernández, Francisco Vidal; Río Fernández, Rocío del; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004)This paper describes a tool that combines an accurate SIMULINK-based time-domain behavioural simulator with a statistical ...
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Ponencia
Simulation-based high-level synthesis of Nyquist-rate data converters using MATLAB/SIMULINK
Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering - SPIE, 2005)This paper presents a toolbox for the simulation, optimization and high-level synthesis of Nyquist-rate Analog-to-Digital ...
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Ponencia
Simulation-based High-level Synthesis of Pipeline Analog-to-Digital Converters
Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Delgado Restituto, Manuel (2004)This paper presents a toolbox for the time-domain simulation and optimization-based high-level synthesis of pipeline ...
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Artículo
Transistor-Level Synthesis of Pipeline Analog-to-Digital Converters Using a Design-Space Reduction Algorithm
Ruiz Amaya, Jesús; Delgado Restituto, Manuel; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2011)A novel transistor-level synthesis procedure for pipeline ADCs is presented. This procedure is able to directly map ...